This invention relates to a module having a wired substrate and a multi-layer circuit overlaid on the substrate and a method of manufacturing the same.
The technique for realizing many LSI chips mounted on a ceramic wired substrate, the so-called multi-chip technique, has developed into the mounting technique which predominates for large scale and high speed digital systems, such as large scale computers and the like. In addition, remarkable progress in the technique of fabricating the multi-layer substrate used above has been achieved.
Various structures are already known for a high density multi-layer wired substrate. In U.S. Pat. No. 4,245,273 issued to Feinberg et al., a multi-layer substrate is formed by the method of green sheets. On the surface of green sheets, the patterns of a signal wire layer, a power source layer and a connecting layer is made by a printing method. Then all the green sheets are mounted together and the multi-layer substrate is formed by a one time sintering. This manufacturing method is, however, not suitable for fine geometry processing.
To solve this problem, a multi-layer ceramic substrate supporting thin-film lines and a VLSI chip is proposed in the technical article by C. W. Ho et al. entitled "The Thin-Film Module as a High-Performance Semiconductor Package" and appearing in IBM J. RES. DEVELOP., Vol 26, No. 3, May 1982, pp. 286-296. The module in this article does not necessarily provicde fine geometry processing on the ceramic multi-layer substrate since the multi-layer wire matrix instead can be used to obtain fine and individual patterns. One problem in such a multi-layer substrate is that the rate of contraction by sintering during the manufacturing process of the ceramic multi-layer substrate varies widely. Accordingly, a gap often occurs between the pattern for connecting to the ceramic multi-layer substrate and the pattern for connecting to the multi-layer wire matrix. Thus a defective connection can easily occur.
On the other hand, in the U.S. Pat. No. 4,245,273 and the article mentioned above, a ceramic is used for the substrate. A ceramic, for example, alumina green sheet, requires a sintering temperature of more than 1400.degree. C. thus prompting the use of high melting point metals like tungsten or molybdenum etc. as a conductive material. The inherent electric resistivity of such a metal is higher than that of metals like gold, silver, or palladium. As a result, the problem arises that it is difficult to reduce the value of the power wire resistance in the ceramic substrate. Furthermore, in the case that the multi-layer wire matrix is formed on top of the ceramic substrate, when tungsten or molybdenum is sintered in air at more than 400.degree. C., the tungsten or molybdenum is oxidized and thus cannot be used as a conductive layer. Accordingly, the process and material for manufacturing multi-layer wire matrices are greatly limited.
Furthermore, for the multi-layer wire matrix, an insulting layer is inserted between upper and lower conductive layers. The electric connection between the upper conductive layer and the lower conductive layer is realized by forming the upper conductive layer on the side of a via hole formed in the insulating layer and the via hole directly connects the upper and lower conductive layers. However, in the multi-layer wire substrate, the thickness of the portion of upper conductive layer at the corner between the upper surface of the insulating layer and the side of the via hold is reduced and becomes so thin that a portion of the upper conductive layer is likely to be cut off from the conductive layer in the via hole.
Next is described a method for fixing a defective portion. A test of the defective signal wire line is possible either at the time of completing the printing of the green sheet or of completing the fabricating of a multi-layer substrate. The check at the completion of printing of the green sheet can be performed optically but an electrical check is impossible because the green sheet is not conductive before sintering. When the multi-layer substrate is completed it is possible to check electrically. However, fixing the defect is not possible in an interior layer of the completed substrate, and it is thus necessary to fix the defect from outside of the substrate. One example of this technique is proposed in an article contributed by Bernard T. Clark et al. to IEEE TRANSACTIONS ON COMPONENTS, HYBRIDS, AND MANUFACTURING TECHNOLOGY, Vol. CHMT-3, No. 1, March 1980, pp. 89-93, under the title of "IBM Multi-Chip Multi-layer Ceramic Modules for LSI Chips--Design for Performance and Density". In the article, fixing of this kind of substrate is done by wiring to pads of a connecting layer on the surface of the substrate. Such a method causes the problems that the reliability of connection is degraded, the number of fixing lines are increased, a great amount of labor for wiring is needed, and the area for mounting elements is reduced by preparing the area for wiring.